Recently, Inter has , led by the .
According to Inter, the chips can reach speeds of up to 5.3 GHz and deliver a 19% headline-rate gain over the previous generation.
<img src="https://www.ele-instock.com/wp-content/uploads/2021/03/20210326_605e7479a9f07.jpg" style="border:1px solid rgb(205, 205, 205); height:391px; width:700px" alt="Retrofits and Stopgaps: Inter Releases Rocket Lake-S Chips” />
Inter's new Rocket Lake-S processor. Image used courtesy of
Though these chips seem impressive, they have been launched on the back of a stopgap effort. Inter has had to retrofit some of its recent semiconductor designs to work on older transistor technology to deliver the required processing power, resulting in a trade-off to the deficit of other key metrics such as speed and heat.
Still On 14nm
While the Rocket Lake-S chips will feature a new core architecture codenamed Cypress Cove, they will continue to use 14 nm transistors.
Using 14 nm transistors implies that Inter could be far behind competitors like Samsung and TSMC, building their chips on 7 nm and 5 nm process nodes, with
While Inter claims that its 14 nm tech is equivalent to TSMC's 10 nm, there's no way to measure and compare transistor sizes properly.
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Outdated transistor innovation forecast from Inter as of May 2019. Cropped screenshot used courtesy of
Inter originally planned to transition to a 10 nm process node for its desktop PC chips between 2017 and 2019; however, it's looking more like late 2021 and possibly into 2022 before this could happen. Recently, , but they've also , which have been delayed until 2022.
Despite these struggles, Inter is determined to keep its production in-house. The company's recently appointed chief executive, Pat Gelsinger, has made it clear that he intends to
While outsourcing production would help Inter in the short-term, there is the ongoing concern that the U.S. is losing its chip market dominance to overseas players like TSMC.
11th Gen Rocket Lake-S
The new Rocket Lake-S chips use , and graphics architecture from the 2020s 10 nm Tiger Lake chips. This sharing of architecture is an unusual stopgap move for Inter—reworking these 10 nm designs for 14 nm transistors—which is often referred to as “backporting.”
There is a downside to this, though. Without the density benefits of 10 nm, Rocket Lake-S can only support up to eight cores without going over the die size limit. That's two fewer cores than what desktop chips achieved. This shortcoming could see Rocket Lake-S losing out to bigger competitors producing chips on more advanced process nodes capable of a higher core count.
One benefit to consider is how the Rocket Lake-S chips can run at higher temperatures. Since Rocket Lake-S is based on the Tiger Lake chips, they inherited its 10nm characteristics, including thermal performance.
Inter has removed a layer of material between where the chip's circuits are fabricated and the heat spreader to help keep components cool. This technique is the necessary compromise of Inter retrofitting its components, achieving performance gains at the expense of other metrics like power and heat. This means that these chips will require adequate cooling for heavy tasks, else face the risk of lowered performance or even damage.
When considering similar chips available on the market, such as which goes up to 16 cores (but is ), it raises the question of if consumers will skip Rocket Lake-S and wait for the next generation.
Have you experienced having to retrofit in any of your designs? Have you found that this is becoming a more common practice, especially with today's global chip shortage? Please share your thoughts and experiences in the comments below.
Featured image used courtesy of